Towards Hardware Implementation of the Simplex Algorithm for LP Decoding

Combining methods of mathematical optimization theory and applications from communications engineering recently led to new approaches for error correction in data transmission systems. In this new discipline, also called LP decoding, researchers so far focussed on theoretical aspects. In this paper, we study how these new algorithms from mathematical theory can be accelerated using dedicated hardware implementations. We address complexity issues of the widely used simplex algorithms and show how new interesting mathematical problems arise if aspects from hardware design are considered.